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Introduction to Digital Logic and Hardware Architecture

A prerequisite course in the Certificate Program in Embedded Systems Engineering.

Course closed to new registrations: Call ( 949 ) 824-5414 for more information or sign up below to be notified when this course becomes available.×

Course Description

Understand the fundamentals of logic design, minimization of circuits, Boolean algebra, common digital logic components and essential Verilog and VHDL statements.. Additional topics include Microcontroller architecture, ALU, memory organization and programming. Learn the concepts of microprocessor-based systems including addressing, instruction set, and I/O interface to peripheral devices and hardware-software interfaces.

Prerequisite: Familiarity with basic mathematics and electronics.

NOTE: The course materials have been developed to work with both the 1st and the 2nd edition of the required textbook. Students may use the 1st edition of the required text for the course if they choose too. The 2nd edition does include updates and current examples.

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  • Details
  • $695
  • April 05, 2021 to June 13, 2021
  • Delivery Mode: Online
  • Reg#: 00211
  • ID/Units: EECS X497.2  (3.00)
    ( Section 1 )
  • Quarter: SPRING 2021

Instructor


Brian Lojeck, M.S., has worked at several major Aerospace and Defense companies including: Boeing, Northrop Grumman, Raytheon, and JPL. He has worked on several manned space vehicles and systems, including NASA’s Constellation, Commercial Crew, and Artemis programs. Brian has also performed stand-up comedy, and has almost a decade’s experience teaching in-person courses.

Textbook Information

Textbooks for your course may be purchased from any vendor or bookseller of your choice.

Required Textbook(s):

DIGITAL DESIGN AND COMPUTER ARCHITECTURE
Book - ISBN: 9780123704979
Harris & Harris , Elsevier (http://www.sciencedirect.com)

Meeting Schedule

EventDateDayStart TimeEnd TimeLocationRoom
START04/05/2021Monday------Online (Access Begins)---
END06/13/2021Sunday------Online (Access Ends)---